Complex semiconductor substrates may be manufactured by combining two or more layers. One class of such engineered substrates is semiconductor-on-insulator substrates, wherein a top semiconductor layer is formed over a carrier substrate with a dielectric layer in between. For the top semiconductor layer and the carrier substrate, silicon is usually used and the dielectric layer is usually an oxide layer, typically a silicon oxide.
Especially so-called high-resistivity (HR) substrates are currently investigated for use for radiofrequency (RF) applications due to their reduced substrate loss and coupling.
It has been found, however, that between the high-resistivity substrate and the thin dielectric layer, a so-called parasitic conduction layer can be formed, compromising the RF performance, particularly the expected benefits in substrate loss and coupling.
Various solutions for this problem have been proposed. For instance, a continuous trap-rich layer under the buried oxide layer has been suggested (“Identification of RF Harmonic Distortion on Si Substrates and its Reduction Using a Trap-Rich Layer” by Kerr, et al., IEEE, 2008). This single trap-rich layer, however, has negative effects connected to the back gate formation process. Particularly, due to a larger lateral doping diffusion and a high interface trap density in the back gate, a problem of variability and, thus, of reliability of the obtained structure may arise.
Furthermore, from U.S. Pat. No. 8,492,868, a method of forming an integrated circuit structure is known, wherein a silicon substrate layer is formed having trench structures and an ion impurity implant. An insulator layer is then positioned on and contacts the silicon substrate layer, wherein the insulator layer also fills the trench structures. A circuitry layer is then positioned on and contacts the buried insulator layer. The ion impurity implant allows avoiding the above-mentioned parasitic conduction layer. Since this method first forms trenches in the substrate and then the buried oxide layer on the substrate; however, the subsequent formation of the semiconductor layer on the buried oxide layer may be complicated. Furthermore, this teaching does not account for the co-integration of, for instance, digital circuits.